Archgen Labs builds AI-powered chip design tools for the next generation of 3D semiconductors. Stacking compute vertically shortens connections and reduces the energy and delay of moving data. But it also makes heat harder to remove. Our tools help engineers optimize placement, timing, and temperature together so they can build faster, more power-efficient 3D chips. Our GPU-accelerated placement engine ranked first in the Hudson River Trading macro-placement challenge. LayerTherm, our thermal analysis tool, predicts chip temperatures roughly 5,000× faster than conventional simulation in our benchmarks, helping engineers explore more designs and identify hotspots earlier.
Newton, our AI chip design engineer, automates work across placement, routing, design-rule fixes, and timing closure. We’re working with GlobalFoundries on 3D chip development, targeting our first tapeout in 2027. The company was founded by Hariharan Ayappane; Naveen Venkat. It is part of YC Fall 2026. It is based in San Francisco, CA, USA.